Bulldog: a compiler for VLSI architectures
Bulldog: a compiler for VLSI architectures
Compilers: principles, techniques, and tools
Compilers: principles, techniques, and tools
Introduction to algorithms
Register allocation with instruction scheduling
PLDI '93 Proceedings of the ACM SIGPLAN 1993 conference on Programming language design and implementation
Storage assignment to decrease code size
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Code generation for a DSP processor
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
The Art of Programming Embedded Systems
The Art of Programming Embedded Systems
Storage assignment to decrease code size
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Instruction selection using binate covering for code size optimization
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Optimized code generation of multiplication-free linear transforms
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Address calculation for retargetable compilation and exploration of instruction-set architectures
DAC '96 Proceedings of the 33rd annual Design Automation Conference
A strategy for real-time kernel support in application-specific HW/SW embedded architectures
DAC '96 Proceedings of the 33rd annual Design Automation Conference
An efficient model for DSP code generation: performance, code size, estimated energy
ISSS '97 Proceedings of the 10th international symposium on System synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
On-chip vs. off-chip memory: the data partitioning problem in embedded processor-based systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Instruction scheduling for power reduction in processor-based system design
Proceedings of the conference on Design, automation and test in Europe
C Compiler Design for an Industrial Network Processor
OM '01 Proceedings of the 2001 ACM SIGPLAN workshop on Optimization of middleware and distributed systems
Heads and tails: a variable-length instruction format supporting parallel fetch and decode
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
Instruction selection using binate covering for code size optimization
Readings in hardware/software co-design
Using Graph Models in Retargetable Optimizing Compilers for Microprocessors with VLIW Architectures
Cybernetics and Systems Analysis
Optimizing precision overhead for x86 processors
Software—Practice & Experience
Probabilistic source-level optimisation of embedded programs
LCTES '05 Proceedings of the 2005 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Using Machine Learning to Focus Iterative Optimization
Proceedings of the International Symposium on Code Generation and Optimization
Reducing code size in VLIW instruction scheduling
Journal of Embedded Computing - Low-power Embedded Systems
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