Transformation rules for designing CNOT-based quantum circuits
Proceedings of the 39th annual Design Automation Conference
Quantum computation and quantum information
Quantum computation and quantum information
Feynman Lectures on Computation
Feynman Lectures on Computation
Fault Testing for Reversible Circuits
VTS '03 Proceedings of the 21st IEEE VLSI Test Symposium
Testing for Missing-Gate Faults in Reversible Circuits
ATS '04 Proceedings of the 13th Asian Test Symposium
A Novel Approach for On-line Testable Reversible Logic Circuit Design
ATS '04 Proceedings of the 13th Asian Test Symposium
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Reversible logic synthesis
A Family of Logical Fault Models for Reversible Circuits
ATS '05 Proceedings of the 14th Asian Test Symposium on Asian Test Symposium
Optimum Test Set for Bridging Fault Detection in Reversible Circuits
ATS '07 Proceedings of the 16th Asian Test Symposium
On the Detection of Missing-Gate Faults in Reversible Circuits by a Universal Test Set
VLSID '08 Proceedings of the 21st International Conference on VLSI Design
Irreversibility and heat generation in the computing process
IBM Journal of Research and Development
Fault diagnosis in reversible circuits under missing-gate fault model
Computers and Electrical Engineering
Synthesis of reversible logic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Logic synthesis of reversible circuits has become an important problem because of its relevance to the emerging area of quantum computation. Special types of quantum gates such as k-CNOT may be deployed to implement a reversible circuit. Although the classical stuck-at fault model is widely used for modeling defects in conventional CMOS circuits, new approaches, namely single missing-gate fault (SMGF), repeated-gate fault (RGF), partial missing-gate fault (PMGF), and multiple missing-gate fault (MMGF), have been found to be more befitting for modeling defects in quantum k-CNOT gates. This article presents an algorithm to derive a test set (TS) for detection of multiple missing-gate faults in a reversible circuit implemented with k-CNOT gates. It is shown that TS is sufficient to detect all single missing-gate faults (SMGFs) and all detectable repeated gate faults (RGFs). Experimental results on test set for some benchmark circuits are reported, which compare favorably with earlier findings.