Telescopic units: increasing the average throughput of pipelined designs by adaptive latency control
DAC '97 Proceedings of the 34th annual Design Automation Conference
Multi-media Applications and Imprecise Computation
DSD '05 Proceedings of the 8th Euromicro Conference on Digital System Design
A Re-design Technique for Datapath Modules in Error Tolerant Applications
ATS '08 Proceedings of the 2008 17th Asian Test Symposium
Best-effort computing: re-thinking parallel software and hardware
Proceedings of the 47th Design Automation Conference
Approximate logic synthesis for error tolerant applications
Proceedings of the Conference on Design, Automation and Test in Europe
Variable-latency design by function speculation
Proceedings of the Conference on Design, Automation and Test in Europe
Slack redistribution for graceful degradation under voltage overscaling
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Trading Accuracy for Power with an Underdesigned Multiplier Architecture
VLSID '11 Proceedings of the 2011 24th International Conference on VLSI Design
IMPACT: imprecise adders for low-power approximate computing
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
Dynamic effort scaling: managing the quality-efficiency tradeoff
Proceedings of the 48th Design Automation Conference
SALSA: systematic logic synthesis of approximate circuits
Proceedings of the 49th Annual Design Automation Conference
Accuracy-configurable adder for approximate arithmetic designs
Proceedings of the 49th Annual Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
CCP: common case promotion for improved timing error resilience with energy efficiency
Proceedings of the 2012 ACM/IEEE international symposium on Low power electronics and design
Quality programmable vector processors for approximate computing
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture
| Hi-index | 0.00 |
Many applications are inherently resilient to in-exactness or approximations in their underlying computations. Approximate circuit design is an emerging paradigm that exploits this inherent resilience to realize hardware implementations that are highly efficient in energy or performance. In this work, we propose Substitute-And-SIMplIfy (SASIMI), a new systematic approach to the design and synthesis of approximate circuits. The key insight behind SASIMI is to identify signal pairs in the circuit that assume the same value with high probability, and substitute one for the other. While these substitutions introduce functional approximations, if performed judiciously, they result in some logic to be eliminated from the circuit while also enabling downsizing of gates on critical paths (simplification), resulting in significant power savings. We propose an automatic synthesis framework that performs substitution and simplification iteratively, while ensuring that a user-specified quality constraint is satisfied. We extend the proposed framework to perform automatic synthesis of quality configurable circuits that can dynamically operate at different accuracy levels depending on application requirements. We used SASIMI to automatically synthesize approximate and quality configurable implementations of a wide range of arithmetic units (Adders, Multipliers, MAC), complex data paths (SAD, FFT butterfly, Euclidean distance) and ISCAS85 benchmarks, using various error metrics such as error rate and average error magnitude. The synthesized approximate circuits demonstrate power improvements of 10%-28% for tight error constraints, and 30%-60% for relaxed error constraints. The quality configurable circuits obtain between 14%-40% improvement in energy in the approximate mode, while incurring no energy overheads in the accurate mode.