The use of observability and external don't cares for the simplification of multi-level networks
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Energy-efficient signal processing via algorithmic noise-tolerance
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
Perturb and Simplify: Optimizing Combinational Circuits with External Don't Cares
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Multi-media Applications and Imprecise Computation
DSD '05 Proceedings of the 8th Euromicro Conference on Digital System Design
A Re-design Technique for Datapath Modules in Error Tolerant Applications
ATS '08 Proceedings of the 2008 17th Asian Test Symposium
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Logic synthesis and circuit customization using extensive external don't-cares
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Scalable effort hardware design: exploiting algorithmic resilience for energy efficiency
Proceedings of the 47th Design Automation Conference
Best-effort computing: re-thinking parallel software and hardware
Proceedings of the 47th Design Automation Conference
Approximate logic synthesis for error tolerant applications
Proceedings of the Conference on Design, Automation and Test in Europe
ERSA: error resilient system architecture for probabilistic applications
Proceedings of the Conference on Design, Automation and Test in Europe
Slack redistribution for graceful degradation under voltage overscaling
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Dynamic knobs for responsive power-aware computing
Proceedings of the sixteenth international conference on Architectural support for programming languages and operating systems
Trading Accuracy for Power with an Underdesigned Multiplier Architecture
VLSID '11 Proceedings of the 2011 24th International Conference on VLSI Design
IMPACT: imprecise adders for low-power approximate computing
Proceedings of the 17th IEEE/ACM international symposium on Low-power electronics and design
MACACO: modeling and analysis of circuits for approximate computing
Proceedings of the International Conference on Computer-Aided Design
Substitute-and-simplify: a unified design paradigm for approximate and quality configurable circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Analysis and characterization of inherent application resilience for approximate computing
Proceedings of the 50th Annual Design Automation Conference
Quality programmable vector processors for approximate computing
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture
On reconfiguration-oriented approximate adder design and its application
Proceedings of the International Conference on Computer-Aided Design
Approximate logic synthesis under general error magnitude and frequency constraints
Proceedings of the International Conference on Computer-Aided Design
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Approximate computing has emerged as a new design paradigm that exploits the inherent error resilience of a wide range of application domains by allowing hardware implementations to forsake exact Boolean equivalence with algorithmic specifications. A slew of manual design techniques for approximate computing have been proposed in recent years, but very little effort has been devoted to design automation. We propose SALSA, a Systematic methodology for Automatic Logic Synthesis of Approximate circuits. Given a golden RTL specification of a circuit and a quality constraint that defines the amount of error that may be introduced in the implementation, SALSA synthesizes an approximate version of the circuit that adheres to the pre-specified quality bounds. We make two key contributions: (i) the rigorous formulation of the problem of approximate logic synthesis, enabling the generation of circuits that are correct by construction, and (ii) mapping the problem of approximate synthesis into an equivalent traditional logic synthesis problem, thereby allowing the capabilities of existing synthesis tools to be fully utilized for approximate logic synthesis. In order to achieve these benefits, SALSA encodes the quality constraints using logic functions called Q-functions, and captures the flexibility that they engender as Approximation Don't Cares (ADCs), which are used for circuit simplification using traditional don't care based optimization techniques. We have implemented SALSA using two off-the-shelf logic synthesis tools - SIS and Synopsys Design Compiler. We automatically synthesize approximate circuits ranging from arithmetic building blocks (adders, multipliers, MAC) to entire datapaths (DCT, FIR, IIR, SAD, FFT Butterfly, Euclidean distance), demonstrating scalability and significant improvements in area (1.1X to 1.85X for tight error constraints, and 1.2X to 4.75X for relaxed error constraints) and power (1.15X to 1.75X for tight error constraints, and 1.3X to 5.25X for relaxed error constraints).