Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation
Proceedings of the 36th annual IEEE/ACM International Symposium on Microarchitecture
Approximation algorithms for array partitioning problems
Journal of Algorithms
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Opportunities and challenges for better than worst-case design
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Timing-constrained and voltage-island-aware voltage assignment
Proceedings of the 43rd annual Design Automation Conference
Post-placement voltage island generation
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Logic and Layout Aware Voltage Island Generation for Low Power Design
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
Voltage Island Generation under Performance Requirement for SoC Designs
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
An ILP algorithm for post-floorplanning voltage-island generation considering power-network planning
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
EVAL: Utilizing processors with variation-induced timing errors
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Incremental improvement of voltage assignment
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Slack redistribution for graceful degradation under voltage overscaling
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Architecting processors to allow voltage/reliability tradeoffs
CASES '11 Proceedings of the 14th international conference on Compilers, architectures and synthesis for embedded systems
Online clock skew tuning for timing speculation
Proceedings of the International Conference on Computer-Aided Design
On timing-independent false path identification
Proceedings of the International Conference on Computer-Aided Design
Recovery-based design for variation-tolerant SoCs
Proceedings of the 49th Annual Design Automation Conference
Placement-Proximity-Based Voltage Island Grouping Under Performance Requirement
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On logic synthesis for timing speculation
Proceedings of the International Conference on Computer-Aided Design
InTimeFix: a low-cost and scalable technique for in-situ timing error masking in logic circuits
Proceedings of the 50th Annual Design Automation Conference
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Region-based multi-supply voltage (MSV) design, by which circuits are partitioned into multiple "voltage islands" and each island operates at a supply voltage that meets its own performance requirement, is an effective technique to tradeoff power and performance. Different from conventional voltage island generation techniques that work in a conservative manner to guarantee "always correct" computation, in this work, we investigate the MSV design problem for timing-speculative circuits, which achieves high energy-efficiency by allowing the occurrence of infrequent timing errors and correcting them online. A novel algorithm based on dynamic programming is developed to tackle this problem. Experimental results on various benchmark circuits demonstrate the effectiveness of the proposed methodology.