Optimization of power dissipation and skew sensitivity in clock buffer synthesis

Authors:
Jae W. Chung;De-Yu Kao;Chung-Kuan Cheng;Ting-Ting Lin
Affiliations:
Department of Computer Science and Engineering, Mail Code 0114, University of California, San Diego, La Jolla, California;Department of Electrical and Computer Engineering, Mail Code 0407, University of California, San Diego, La Jolla, California;Department of Computer Science and Engineering, Mail Code 0114, University of California, San Diego, La Jolla, California;Department of Electrical and Computer Engineering, Mail Code 0407, University of California, San Diego, La Jolla, California
Venue:
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
Year:
1995

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