Rapid frequency-domain analog fault simulation under parameter tolerances

  • Authors:
  • Michael W. Tian;C.-J. Richard Shi

  • Affiliations:
  • Department of Electrical and Computer Engineering, University of Iowa, Iowa City, Iowa;Department of Electrical and Computer Engineering, University of Iowa, Iowa City, Iowa

  • Venue:
  • DAC '97 Proceedings of the 34th annual Design Automation Conference
  • Year:
  • 1997

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Abstract

Fault-driven analog and mixed-signal testing calls for rapid fault simulationtechniques. A problem that has not been addressed effectivelyby existing research is that circuit parameters have tolerance ranges.In this paper, we propose representing parameters under variations asintervals, and present an efficient algorithm - based on interval analysisand Householder's formula - to compute the worst-case responsebounds of good and faulty linear(ized) circuits under parameter variations.Our approach takes CPU time comparable to one nominal circuitsimulation, and always produces correct and conservative results. Thealgorithm has been implemented into SPICE3F5. Experimental resultsshow an acceptable accuracy.