CELLERITY: a fully automatic layout synthesis system for standard cell libraries

  • Authors:
  • Mohan Guruswamy;Robert L. Maziasz;Daniel Dulitz;Srilata Raman;Venkat Chiluvuri;Andrea Fernandez;Larry G. Jones

  • Affiliations:
  • Unified Design System Laboratory, Motorola, Inc., Austin, Texas;Unified Design System Laboratory, Motorola, Inc., Austin, Texas;Unified Design System Laboratory, Motorola, Inc., Austin, Texas;Unified Design System Laboratory, Motorola, Inc., Austin, Texas;Unified Design System Laboratory, Motorola, Inc., Austin, Texas;Unified Design System Laboratory, Motorola, Inc., Austin, Texas;Unified Design System Laboratory, Motorola, Inc., Austin, Texas

  • Venue:
  • DAC '97 Proceedings of the 34th annual Design Automation Conference
  • Year:
  • 1997

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Abstract

This paper describes a fully automatic standard-cell layoutsynthesis system, CELLERITY. The system is flexible insupporting a wide variety of process technologies and a range oflibrary template styles. The tool is fully automatic and providesseveral options to the user to customize the layout template. Thetool considers performance and yield and generates dense,design-rule correct layouts. Experimental results indicate that thearea of CELLERITY-generated standard cells is competitive withmanually designed cells in a majority of circuits. In block-leveltests of industrial circuits, standard-cell blocks generated usingCELLERITY cells are about equal to the block area produced byusing a manually-designed library. Recently, an embeddedmicrocontroller in a state-of-the-art sub-micron processtechnology was fabricated using CELLERITY-generated standard cells.