Test-set preserving logic transformations
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Formal verification by symbolic evaluation of partially-ordered trajectories
Formal Methods in System Design - Special issue on symbolic model checking
Logic verification methodology for PowerPC microprocessors
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Extracting RTL models from transistor netlists
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Structured Logic Testing
An Experimental Chip to Evaluate Test Techniques: Experiment Results
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Using Target Faults To Detect Non-Tartget Defects
Proceedings of the IEEE International Test Conference on Test and Design Validity
PowerPCTM Array Verification Methodology using Formal Techniques
Proceedings of the IEEE International Test Conference on Test and Design Validity
The Effectiveness of IDDQ, Functional and Scan Tests: How Many Fault Coverages Do We Need?
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Next-Generation PowerPCTM Microprocessor Test Strategy Improvements
Proceedings of the IEEE International Test Conference
REDO - Probabilistic Excitation and Deterministic Observation - First Commercial Experiment
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
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Custom circuits, in contrast to those synthesized byautomatic tools, are manually designed blocks of which theperformance is critical to the full chip operation. Testing theseblocks represents a major challenge and thus a crucial time-to-marketfactor in today's PowerPC microprocessor design environment. Thispaper investigates various methodologies for testing custom blocks.Issues of efficiently obtaining proper circuit models for ATPG toolsas well as producing quality tests will be analyzed and discussed.Tradeoffs among various methods will be analyzed and compared.Experience and results based on recent PowerPC microprocessors willbe reported.