Branch-and-bound placement for building block layout
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
The art of computer programming, volume 1 (3rd ed.): fundamental algorithms
An O-tree representation of non-slicing floorplan and its applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A new algorithm for floorplan design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Block placement with symmetry constraints based on the O-tree non-slicing representation
Proceedings of the 37th Annual Design Automation Conference
Analog Device-Level Layout Automation
Analog Device-Level Layout Automation
VLSI module placement based on rectangle-packing by the sequence-pair
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Symmetry within the sequence-pair representation in the context of placement for analog design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Placement with symmetry constraints for analog layout design using TCG-S
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Analog placement based on novel symmetry-island formulation
Proceedings of the 44th annual Design Automation Conference
Analog placement based on hierarchical module clustering
Proceedings of the 45th annual Design Automation Conference
Analog placement based on symmetry-island formulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Performance-driven analog placement considering boundary constraint
Proceedings of the 47th Design Automation Conference
Heterogeneous B*-trees for analog placement with symmetry and regularity considerations
Proceedings of the International Conference on Computer-Aided Design
Routability-driven placement algorithm for analog integrated circuits
Proceedings of the 2012 ACM international symposium on International Symposium on Physical Design
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Several novel topological representations of non-slicing floor-plans [2] have been more recently proposed, providing new ideas and techniques for solving block placement problems and other related layout applications. Among these topological representations, ordered trees exhibit a lower redundancy and, therefore, a provable smaller search space, which makes them the best topological candidate for solving general block placement problems. Starting from the early eighties, binary trees have been widely used to represent slicing floorplans [7]. This paper shows that binary trees can efficiently model non-slicing floorplans as well, as there is a one-to-one mapping between the sets of binary and ordered trees representing the floorplan. Moreover, this paper shows that binary trees exhibiting a certain property can be used to represent block placement configurations with symmetry constraints, which is very useful when dealing with device-level placement problems for analog layout. As the number of these trees is proven to be smaller than the number of symmetric-feasible sequence-pairs [1], using binary trees is better than using either sequence-pairs or O-trees when solving analog placement problems. A comparative evaluation, substantiating these theoretical results, has been carried out by providing alternative optimization engines to a placement tool operating in an industrial environment.