Design of Fast Self-Testing Checkers for a Class of Berger Codes
IEEE Transactions on Computers
Error-control coding for computer systems
Error-control coding for computer systems
Efficient Modular Design of TSC Checkers for M-out-of-2M-Codes
IEEE Transactions on Computers
Low-Cost Modular Totally Self-Checking Checker Design for $m$-out-of-$n$ Code
IEEE Transactions on Computers
Intermediacy Prediction for High Speed Berger Code Checkers
Journal of Electronic Testing: Theory and Applications
Design Method of a Class of Embedded Combinational Self-Testing Checkers for Two-Rail Codes
IEEE Transactions on Computers - Special issue on fault-tolerant embedded systems
IEEE Transactions on Computers
DFT '95 Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
16.1 Novel Single and Double Output TSC Berger Code Checkers
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
Programmable Embedded Self-Testing Checkers for All-Unidirectional Error-Detecting Codes
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
Single- and Double-Output Embedded Checker Architectures for Systematic Unordered Codes"
Journal of Electronic Testing: Theory and Applications
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
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Totally self-checking (TSC) Berger code checker designs are presented. The generalized Berger check partitioning is derived. It is proven that a TSC Berger code checker can be constructed from a TSC m-out-of-n checker. For a TSC Berger code checker design, no two-output checker exists for information length 2/sup r-1/, for any positive nonzero r. The presented approach solves this open problem.