Asynchronous state machine synthesis using data driven clocks
EURO-DAC '92 Proceedings of the conference on European design automation
Designing an Asynchronous Communications Chip
IEEE Design & Test
Decomposition methods for library binding of speed-independent asynchronous designs
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Estimation and bounding of energy consumption in burst-mode control circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
A technique for synthesizing distributed burst-mode circuits
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Espresso-HF: a heuristic hazard-free minimizer for two-level logic
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Unifying synchronous/asynchronous state machine synthesis
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Synthesis of low-power asynchronous circuits in a specified environment
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Automatic synthesis of 3D asynchronous state machines
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Exact two-level minimization of hazard-free logic with multiple-input changes
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Practical advances in asynchronous design and in asynchronous/synchronous interfaces
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Delay-insensitive interface specification and synthesis
DATE '00 Proceedings of the conference on Design, automation and test in Europe
An FPGA for Implementing Asynchronous Circuits
IEEE Design & Test
Saving Power by Synthesizing Gated Clocks for Sequential Circuits
IEEE Design & Test
Hazards, Critical Races, and Metastability
IEEE Transactions on Computers
A Programming Approach to the Design of Asynchronous Logic Blocks
Concurrency and Hardware Design, Advances in Petri Nets
Optimization of NULL convention self-timed circuits
Integration, the VLSI Journal
Robust interfaces for mixed-timing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Journal of Systems Architecture: the EUROMICRO Journal
Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines
IEEE Transactions on Computers
Desynchronisation Technique Using Petri Nets
Electronic Notes in Theoretical Computer Science (ENTCS)
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