DFT Strategy for Intel Microprocessors

High volume microprocessor test escapes, an analysis of defects our tests are missing

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Test Methodology for the McKinley Processor

ITC '01 Proceedings of the 2001 IEEE International Test Conference

PENTIUM® PRO PROCESSOR DESIGN FOR TEST AND DEBUG

ITC '97 Proceedings of the 1997 IEEE International Test Conference

Logic BIST for Large Industrial Designs: Real Issues and Case Studies

ITC '99 Proceedings of the 1999 IEEE International Test Conference

Silicon Debug: Scan Chains Alone Are Not Enough

ITC '99 Proceedings of the 1999 IEEE International Test Conference

System-on-Chip Test Architectures: Nanometer Design for Testability

System-on-Chip Test Architectures: Nanometer Design for Testability

On-Chip Delay Measurement Based Response Analysis for Timing Characterization

Journal of Electronic Testing: Theory and Applications

Gradual diagnostic test generation and observation point insertion based on the structural distance between indistinguished fault pairs

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Built-in generation of multicycle functional broadside tests with observation points

ACM Transactions on Design Automation of Electronic Systems (TODAES)