Silicon Debug: Scan Chains Alone Are Not Enough

  • Authors:
  • Gert Jan van Rootselaar;Bart Vermeulen

  • Affiliations:
  • -;-

  • Venue:
  • ITC '99 Proceedings of the 1999 IEEE International Test Conference
  • Year:
  • 1999

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Abstract

For today's multi-million transistor designs, existingdesign verification techniques cannot guarantee thatfirst silicon is designed error free. Therefore,techniques are necessary to efficiently debug first-silicon.In this article, we present a methodology fordebugging multiple clock domain systems-on-a-chip.In addition to scan chains, a set of Design-for-Debugmodules is designed into an IC to make itdebuggable. Debugger tool software interacts withthe on-chip DfD to make the debug features availablefrom a workstation.