An IEEE 1149.1 Compliant Test Control Architecture
Journal of Electronic Testing: Theory and Applications
Designing UltraSparc for Testability
IEEE Design & Test
Automated Diagnosis in Testing and Failure Analysis
IEEE Design & Test
Design of Cache Test Hardware on the HP PA8500
IEEE Design & Test
Design for Debug: Catching Design Errors in Digital Chips
IEEE Design & Test
Diagnostic techniques for the UltraSPARC microprocessors
ITC '98 Proceedings of the 1998 IEEE International Test Conference
FakeFault: a silicon debug software tool for microprocessor embedded memory arrays
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Designing for scan test of high performance embedded memories
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A fault diagnosis methodology for the UltraSPARC/sup TM/-I microprocessor
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Using ATPG for clock rules checking in complex scan designs
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Test and On-line Debug Capabilities of IEEE Std 1149.1 in UltraSPARC"-III Microprocessor
ITC '00 Proceedings of the 2000 IEEE International Test Conference
Test Methodology for the McKinley Processor
ITC '01 Proceedings of the 2001 IEEE International Test Conference
Test and Debug Strategy of the PNX8525 Nexperia" Digital Video Platform System Chip
ITC '01 Proceedings of the 2001 IEEE International Test Conference
DESIGN OF CACHE TEST HARDWARE ON THE HP PA8500
ITC '97 Proceedings of the 1997 IEEE International Test Conference
SCAN SYNTHESIS FOR ONE-HOT SIGNALS
ITC '97 Proceedings of the 1997 IEEE International Test Conference
DFT, Test Lifecycles and the Product Lifecycle
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Silicon Debug: Scan Chains Alone Are Not Enough
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Expediting Ramp-to-Volume Production
ITC '99 Proceedings of the 1999 IEEE International Test Conference
Towards Reducing "Functional Only" Fails for the UltraSPARCTM Microprocessors
ITC '99 Proceedings of the 1999 IEEE International Test Conference
The Test and Debug Features of the AMD-K7TM Microprocessor
ITC '99 Proceedings of the 1999 IEEE International Test Conference
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
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