Realistic fault modeling for VLSI testing
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Design of ICs applying built-in current testing
Journal of Electronic Testing: Theory and Applications - Special issue on IDDQ testing of VLSI circuits
Fault dictionary compression and equivalence class computation for sequential circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
On the generation of small dictionaries for fault location
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Defect Classes - An Overdue Paradigm for CMOS IC
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
Testability, Debuggability, and Manufacturability Features of the UltraSPARCTM-I Microprocessor
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Finding Defects with Fault Models
Proceedings of the IEEE International Test Conference on Driving Down the Cost of Test
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Towards the logic defect diagnosis for partial-scan designs
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
On applying non-classical defect models to automated diagnosis
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Delay Fault Diagnosis for Non-Robust Test
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Diagnosis of multiple-voltage design with bridge defect
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 0.00 |
In this paper we study the use of precomputed fault dictionaries to diagnose stuck-at and bridging defects in the UltraSPARC/sup TM/-I processor. In constructing the dictionary we analyze the effect of the dictionary format on parameters such as memory size, computational effort, and diagnostic resolution. The dictionary is built based on modeled stuck-at faults. However to effectively diagnose both stuck-at and bridging faults, we employ a novel procedure that combines dictionary information with potential bridge defects extracted from layout. Experiments with failing devices show excellent correlation of predicted errors with actual defects.