Robust wiring networks for DfY considering timing constraints

Authors:
Philipp V. Panitz;Markus Olbrich;Erich Barke;Jürgen Koehl
Affiliations:
University of Hannover, Hannover, Germany;University of Hannover, Hannover, Germany;University of Hannover, Hannover, Germany;IBM Deutschland Entwicklung GmbH, Boeblingen, Germany
Venue:
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Year:
2007

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Abstract

In nanometer technologies the importance of opens as yield detractors considerably increases. This requires to reconsider traditional tree based routing approaches for signal wiring. We propose a Greedy Minimum Routing Tree Augmentation (GMRTA) algorithm that shows significantly better results than previous approaches. The algorithm adds links to routing trees, thus increases its robustness against open defects. By exploiting that edges in multiple loops can be removed the augmentation efficiency is further improved. As a special feature, our algorithm keeps timing constraints which have not been considered by previous GMRTA algorithms.