A technique for two-dimensional pattern matching
Communications of the ACM - Special issue: multiprocessing
Optical proximity correction (OPC): friendly maze routing
Proceedings of the 41st annual Design Automation Conference
RADAR: RET-aware detailed routing using fast lithography simulations
Proceedings of the 42nd annual Design Automation Conference
Accurate detection for process-hotspots with vias and incomplete specification
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction
Proceedings of the 45th annual Design Automation Conference
Predictive formulae for OPC with applications to lithography-friendly routing
Proceedings of the 45th annual Design Automation Conference
An automatic optical-simulation-based lithography hotspot fix flow for post-route optimization
Proceedings of the 2009 international symposium on Physical design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Predictive formulae for OPC with applications to lithography-friendly routing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An automatic optical simulation-based lithography hotspot fix flow for post-route optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SAT based multi-net rip-up-and-reroute for manufacturing hotspot removal
Proceedings of the Conference on Design, Automation and Test in Europe
High performance lithographic hotspot detection using hierarchically refined machine learning
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Proceedings of the 48th Design Automation Conference
Accurate process-hotspot detection using critical design rule extraction
Proceedings of the 49th Annual Design Automation Conference
Proceedings of the 50th Annual Design Automation Conference
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In current manufacturing processes, certain layout configurations are likely to have reduced yield and/or reliability due to increased susceptibility to stress effects or poor tolerance to certain processes like lithography. These problematic layout configurations need to be efficiently detected and eliminated from a design layout to enable better yield. In this paper, such layout configurations are called processhotspots and an efficient and scalable algorithm is proposed to detect such process-hotspots in a given layout. The concept of a range pattern is introduced and used to accurately and compactly represent these process-hotspots. This representation is flexible and can incorporate information about the deficiencies of available modeling and/or subsequent correction (for instance, mask synthesis) techniques. Each range pattern can also be associated with a scoring mechanism to score the problem regions according to yield impact. A library of range patterns is being developed in collaboration with a fab. The proposed process-hotspot detection system assumes that process-hotspots are specified as a library of range patterns and determines all occurrences of any of these range patterns in a layout. It is fast and accurate and can be applied to large industrial layouts. Unlike previous work, the proposed scheme can identify problems that cannot be efficiently modeled or corrected by subsequent mask synthesis techniques and can thereby complement existing work in that area. Experimental results are quite promising and show that all locations that match a range pattern in a given layout can be found in a matter of minutes.