Network flows: theory, algorithms, and applications
Network flows: theory, algorithms, and applications
Introduction to Algorithms
Design for Manufacturing in the Semiconductor Industry: The Litho/Design Workshops
VLSID '99 Proceedings of the 12th International Conference on VLSI Design - 'VLSI for the Information Appliance'
Multilevel full-chip routing with testability and yield enhancement
Proceedings of the 2005 international workshop on System level interconnect prediction
RADAR: RET-aware detailed routing using fast lithography simulations
Proceedings of the 42nd annual Design Automation Conference
Backend CAD flows for "restrictive design rules"
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Maze routing with OPC consideration
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Redundant-via enhanced maze routing for yield improvement
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Multilevel full-chip gridless routing considering optical proximity correction
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
BoxRouter: a new global router based on box expansion and progressive ILP
Proceedings of the 43rd annual Design Automation Conference
Pattern sensitive placement for manufacturability
Proceedings of the 2007 international symposium on Physical design
Efficient process-hotspot detection using range pattern matching
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Accurate detection for process-hotspots with vias and incomplete specification
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
A yield-driven gridless router
Journal of Computer Science and Technology
Wire sizing and spacing for lithographic printability and timing optimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction
Proceedings of the 45th annual Design Automation Conference
Predictive formulae for OPC with applications to lithography-friendly routing
Proceedings of the 45th annual Design Automation Conference
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
An automatic optical-simulation-based lithography hotspot fix flow for post-route optimization
Proceedings of the 2009 international symposium on Physical design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Routing for manufacturability and reliability
IEEE Circuits and Systems Magazine
Predictive formulae for OPC with applications to lithography-friendly routing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An automatic optical simulation-based lithography hotspot fix flow for post-route optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SAT based multi-net rip-up-and-reroute for manufacturing hotspot removal
Proceedings of the Conference on Design, Automation and Test in Europe
Pattern sensitive placement perturbation for manufacturability
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 48th Design Automation Conference
Improved tangent space based distance metric for accurate lithographic hotspot classification
Proceedings of the 49th Annual Design Automation Conference
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As the technology migrates into the deep submicron manufacturing(DSM) era, the critical dimension of the circuits is getting smaller than the lithographic wavelength. The unavoidable light diffraction phenomena in the sub-wavelength technologies have become one of the major factors in the yield rate. Optical proximity correction (OPC) is one of the methods adopted to compensate for the light diffraction effect as a post layout process.However, the process is time-consuming and the results are still limited by the original layout quality. In this paper, we propose a maze routing method that considers the optical effect in the routing algorithm. By utilizing the symmetrical property of the optical system, the light diffraction is efficiently calculated and stored in tables. The costs that guide the router to minimize the optical interferences are obtained from these look-up tables. The problem is first formulated as a constrained maze routing problem, then it is shown to be a multiple constrained shortest path problem. Based on the Lagrangian relaxation method, an effective algorithm is designed to solve the problem.