Route packets, not wires: on-chip inteconnection networks
Proceedings of the 38th annual Design Automation Conference
Coping with Latency in SOC Design
IEEE Micro
IEEE Transactions on Parallel and Distributed Systems
Interconnection Networks Enable Fine-Grain Dynamic Multi-tasking on FPGAs
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Guaranteeing the quality of services in networks on chip
Networks on chip
Proceedings of the conference on Design, automation and test in Europe - Volume 2
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A Scheduling Discipline for Latency and Bandwidth Guarantees in Asynchronous Network-on-Chip
ASYNC '05 Proceedings of the 11th IEEE International Symposium on Asynchronous Circuits and Systems
An Asynchronous NOC Architecture Providing Low Latency Service and Its Multi-Level Design Framework
ASYNC '05 Proceedings of the 11th IEEE International Symposium on Asynchronous Circuits and Systems
Using Mobilize Power Management IP for Dynamic & Static Power Reduction in SoC at 130 nm
Proceedings of the conference on Design, Automation and Test in Europe - Volume 3
Cross clock-domain TDM virtual circuits for networks on chips
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
Microprocessors & Microsystems
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This paper proposes a new approach dealing with the tedious problem of NoC guaranteed traffics according to GALS constraints impelled by the upcoming large System-on-Chips with multiclock domains. Our solution has been designed to adjust a trade-off between synchronous and clockless asynchronous techniques. By means of smart interfaces between synchronous sub-NoCs, Quality-of-Service (QoS) for guaranteed traffic is assured over the entire chip despite clock heterogeneity. This methodology can be easily integrated in the usual NoC design flow as an extension to traditional NoC synchronous design flows. We present real implementation obtained with our tool for a 4G telecom scheme.