Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
Optimal FPGA module placement with temporal precedence constraints
Proceedings of the conference on Design, automation and test in Europe
Reconfigurable computing: a survey of systems and software
ACM Computing Surveys (CSUR)
Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications
Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications
Configuration relocation and defragmentation for run-time reconfigurable computing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Fast Template Placement for Reconfigurable Computing Systems
IEEE Design & Test
Priority Inheritance Protocols: An Approach to Real-Time Synchronization
IEEE Transactions on Computers
On-line Defragmentation for Run-Time Partially Reconfigurable FPGAs
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Integrating Multimedia Applications in Hard Real-Time Systems
RTSS '98 Proceedings of the IEEE Real-Time Systems Symposium
Designing an Operating System for a Heterogeneous Reconfigurable SoC
IPDPS '03 Proceedings of the 17th International Symposium on Parallel and Distributed Processing
The case for reconfigurable hardware in wearable computing
Personal and Ubiquitous Computing
Online Scheduling and Placement of Real-time Tasks to Partially Reconfigurable Devices
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
Real-time LUT-based network topologies for dynamic and partial FPGA self-reconfiguration
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
A Lightweight Approach for Embedded Reconfiguration of FPGAs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Operating Systems for Reconfigurable Embedded Platforms: Online Scheduling of Real-Time Tasks
IEEE Transactions on Computers
Sensor network-based countersniper system
SenSys '04 Proceedings of the 2nd international conference on Embedded networked sensor systems
The Development of an Operating System for Reconfigurable Computing
FCCM '01 Proceedings of the the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Adaptive Allocation of Software and Hardware Real-Time Tasks for FPGA-based Embedded Systems
RTAS '06 Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications Symposium
Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
FPGA-based real-time optical-flow system
IEEE Transactions on Circuits and Systems for Video Technology
ReconOS: Multithreaded programming for reconfigurable computers
ACM Transactions on Embedded Computing Systems (TECS)
Run-time HW/SW scheduling of data flow applications on reconfigurable architectures
EURASIP Journal on Embedded Systems - Special issue on design and architectures for signal and image processing
Efficient task scheduling for runtime reconfigurable systems
Journal of Systems Architecture: the EUROMICRO Journal
Dynamic objects: Supporting fast and easy run-time reconfiguration in FPGAs
Journal of Systems Architecture: the EUROMICRO Journal
A low overhead abstract architecture for FPGA resource management
ACM SIGARCH Computer Architecture News - ACM SIGARCH Computer Architecture News/HEART '12
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Operating systems for reconfigurable devices enable the development of embedded systems where software tasks, running on a CPU, can coexist with hardware tasks running on a reconfigurable hardware device (FPGA). In this work, we consider real-time systems subject to dynamic workloads and whose tasks can be computationally intensive. We introduce a novel resource allocation scheme and an online admission control test that achieve high performance and flexibility; in addition, runtime reconfiguration is used to maximize the number of admitted real-time tasks. More in details, we first discuss a 1D system architecture and its prototype for a Xilinx Virtex-4 FPGA; then, we concentrate on the on-line admission control problem. Online task allocation and migration between the CPU and the reconfigurable device are discussed and sufficient feasibility tests are derived for both the commonly used slotted and 1D area models. Finally, the effectiveness of our admission control and relocation strategy is shown through a series of synthetic simulations.