Practical Design of Globally-Asynchronous Locally-Synchronous Systems
ASYNC '00 Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Cycle-Accurate Energy Measurement and Characterization of FPGAs
Analog Integrated Circuits and Signal Processing
Proceedings of the conference on Design, automation and test in Europe: Proceedings
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Voltage-frequency island partitioning for GALS-based networks-on-chip
Proceedings of the 44th annual Design Automation Conference
Energy- and performance-aware mapping for regular NoC architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Capturing topology-level implications of link synthesis techniques for nanoscale networks-on-chip
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Slotless module-based reconfiguration of embedded FPGAs
ACM Transactions on Embedded Computing Systems (TECS)
A networks-on-chip emulation/verification framework
International Journal of High Performance Systems Architecture
NOCS '11 Proceedings of the Fifth ACM/IEEE International Symposium on Networks-on-Chip
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Although a significant amount of theoretical work supports the potential of NoC architectures, such results need to be demonstrated by actual implementations before the NoC paradigm becomes a reality. Besides demonstrating the feasibility of the overall approach, prototyping enables accurate evaluation of power, performance, area, and various design trade-offs. This article presents four NoC prototypes, discusses the challenges associated with their design, and assesses the potential of the NoC approach.