PathFinder: a negotiation-based performance-driven router for FPGAs
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Timing driven placement for large standard cell circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A new generalized row-based global router
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Global routing with crosstalk constraints
DAC '98 Proceedings of the 35th annual Design Automation Conference
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Congestion-driven codesign of power and signal networks
Proceedings of the 39th annual Design Automation Conference
Accurate pseudo-constructive wirelength and congestion estimation
Proceedings of the 2003 international workshop on System-level interconnect prediction
A global routing algorithm for general cells
DAC '84 Proceedings of the 21st Design Automation Conference
Global routing of row-based integrated circuits
Global routing of row-based integrated circuits
Detailed routing algorithms for vlsi circuits
Detailed routing algorithms for vlsi circuits
A global router for sea-of-gates circuits
EURO-DAC '91 Proceedings of the conference on European design automation
A Fast Crosstalk- and Performance-Driven Multilevel Routing System
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2006 international symposium on Physical design
BoxRouter: a new global router based on box expansion and progressive ILP
Proceedings of the 43rd annual Design Automation Conference
FastRoute 2.0: A High-quality and Efficient Global Router
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
High-performance routing at the nanometer scale
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Generation of performance constraints for layout
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Global routing by new approximation algorithms for multicommodity flow
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On integrating power and signal routing for shield count minimization in congested regions
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
MARS-a multilevel full-chip gridless routing system
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 2009 International Conference on Computer-Aided Design
Multilayer global routing with via and wire capacity considerations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An enhanced global router with consideration of general layer directives
Proceedings of the 2011 international symposium on Physical design
GLADE: a modern global router considering layer directives
Proceedings of the International Conference on Computer-Aided Design
Design and analysis of via-configurable routing fabrics for structured ASICs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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In this paper, we present several shortcomings of current global routers and propose enhancements to remedy the problems. We propose that global routers incorporate aspects of both placement and detail routing in order to improve the quality of the global routing. In addition, we propose the use of a constrained die methodology to complement fixed and variable die design flows. This paper outlines the algorithms present in the commercial global routers available for InternetCAD.com, Inc.