FastRoute: a step to integrate global routing into placement
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
FastRoute 2.0: A High-quality and Efficient Global Router
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
The coming of age of physical synthesis
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Fast interconnect synthesis with layer assignment
Proceedings of the 2008 international symposium on Physical design
Proceedings of the 2008 international symposium on Physical design
BoxRouter 2.0: A hybrid and robust global router with layer assignment for routability
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Multi-layer global routing considering via and wire capacities
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
High-performance global routing with fast overflow reduction
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Robust layer assignment for via optimization in multi-layer global routing
Proceedings of the 2009 international symposium on Physical design
Archer: a history-based global routing algorithm
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 2009 International Conference on Computer-Aided Design
Completing high-quality global routes
Proceedings of the 19th international symposium on Physical design
A parallel integer programming approach to global routing
Proceedings of the 47th Design Automation Conference
NTHU-route 2.0: a robust global router for modern designs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An auction based pre-processing technique to determine detour in global routing
Proceedings of the International Conference on Computer-Aided Design
GLADE: a modern global router considering layer directives
Proceedings of the International Conference on Computer-Aided Design
FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Congestion-Constrained Layer Assignment for Via Minimization in Global Routing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
MaizeRouter: Engineering an Effective Global Router
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A SimPLR method for routability-driven placement
Proceedings of the International Conference on Computer-Aided Design
BonnRoute: Algorithms and data structures for fast and good VLSI routing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Delay-driven layer assignment in global routing under multi-tier interconnect structure
Proceedings of the 2013 ACM international symposium on International symposium on physical design
CATALYST: planning layer directives for effective design closure
Proceedings of the Conference on Design, Automation and Test in Europe
Routing congestion estimation with real design constraints
Proceedings of the 50th Annual Design Automation Conference
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In this paper we study a global routing problem that considers not only overflow and wirelength but also layer directives. A layer directive is often given to a timing-critical net for meeting target performance, and it specifies a range of consecutive layers on which the net should be routed. Unlike a previous work that focuses only on a restricted set of layer ranges, our problem allows arbitrary layer ranges to be specified. We present a global router which enhances an academic router by employing techniques to take general layer directives into account during two-dimensional (2D) routing and layer assignment. The experiment results show that our global router can produce encouraging solutions for all test cases.