FastRoute: a step to integrate global routing into placement
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
FastRoute 2.0: A High-quality and Efficient Global Router
ASP-DAC '07 Proceedings of the 2007 Asia and South Pacific Design Automation Conference
The coming of age of physical synthesis
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Archer: a history-driven global routing algorithm
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
BoxRouter 2.0: architecture and implementation of a hybrid and robust global router
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Fast interconnect synthesis with layer assignment
Proceedings of the 2008 international symposium on Physical design
Proceedings of the 2008 international symposium on Physical design
A new global router for modern designs
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
NTHU-Route 2.0: a fast and stable global router
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
FastRoute3.0: a fast and high quality global router based on virtual capacity
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Multi-layer global routing considering via and wire capacities
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
FastRoute 4.0: global router with efficient via minimization
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
High-performance global routing with fast overflow reduction
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Robust layer assignment for via optimization in multi-layer global routing
Proceedings of the 2009 international symposium on Physical design
GRIP: scalable 3D global routing using integer programming
Proceedings of the 46th Annual Design Automation Conference
Proceedings of the 2009 International Conference on Computer-Aided Design
FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
High-Performance Routing at the Nanometer Scale
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Congestion-Constrained Layer Assignment for Via Minimization in Global Routing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An enhanced global router with consideration of general layer directives
Proceedings of the 2011 international symposium on Physical design
A SimPLR method for routability-driven placement
Proceedings of the International Conference on Computer-Aided Design
Planning for local net congestion in global routing
Proceedings of the 2013 ACM international symposium on International symposium on physical design
Delay-driven layer assignment in global routing under multi-tier interconnect structure
Proceedings of the 2013 ACM international symposium on International symposium on physical design
CATALYST: planning layer directives for effective design closure
Proceedings of the Conference on Design, Automation and Test in Europe
Routing congestion estimation with real design constraints
Proceedings of the 50th Annual Design Automation Conference
A study on unroutable placement recognition
Proceedings of the 2014 on International symposium on physical design
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Global routing is a very crucial stage in a design cycle, because it physically plans the routes of nets on a chip. In order to boost the research and development of global routing techniques, ISPD held contests and released benchmarks in 2007 and 2008, respectively. However, the contests may lead researchers away from facing other real problems in practice. In this paper we study a new global routing problem that not only considers traditional routing objectives such as overflow and wirelength but also focuses on honoring layer directives that are usually specified for timing-critical nets to alleviate performance degrading. Based on novel extensions of an academic router, we present a new global router called GLADE for the addressed problem. The experimental results show that GLADE can effectively generate a high-quality solution, which balances the metrics under consideration, for each test case from the set of recently released ICCAD 2009 benchmarks.