A probabilistic technique for full-chip leakage estimation

  • Authors:
  • Shaobo Liu;Qinru Qiu;Qing Wu

  • Affiliations:
  • Binghamton University, State University of New York, Binghamton, NY, USA;Binghamton University, State University of New York, Binghamton, NY, USA;Binghamton University, State University of New York, Binghamton, NY, USA

  • Venue:
  • Proceedings of the 13th international symposium on Low power electronics and design
  • Year:
  • 2008

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Abstract

In this paper, we propose a probability-based algorithm to estimate full-chip leakage without knowing layout information, under intra-die and inter-die process variations. Through modeling process variations into a random vector, we show that the standard cell leakage can be modeled as an inverse Gaussian random variable and further demonstrate that full-chip leakage can also be approximated to be an inverse Gaussian random variable. Hence, the leakage estimation problem is reduced to the estimation of the mean value and variance of the full-chip leakage. Experimental results show that the proposed algorithm is over 1000X faster than Monte Carlo simulation while the maximum estimation error is less than 6%.