Area and delay mapping for table-look-up based field programmable gate arrays

Performance directed technology mapping for look-up table based FPGAs

DAC '93 Proceedings of the 30th international Design Automation Conference

Combinational logic synthesis for LUT based field programmable gate arrays

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Optimal clock period FPGA technology mapping for sequential circuits

DAC '96 Proceedings of the 33rd annual Design Automation Conference

A new retiming-based technology mapping algorithm for LUT-based FPGAs

FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays

Optimal clock period FPGA technology mapping for sequential circuits

ACM Transactions on Design Automation of Electronic Systems (TODAES)

A tutorial on logic synthesis for lookup-table based FPGAs

ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

An optimal technology mapping algorithm for delay optimization in lookup-table based FPGA designs

ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design

BDD-based logic synthesis for LUT-based FPGAs

ACM Transactions on Design Automation of Electronic Systems (TODAES)

An efficient algorithm for finding the minimal-area FPGA technology mapping

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Efficient LUT-based FPGA technology mapping for power minimization

ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference