Logic design principles with emphasis on testable semicustom circuits
Logic design principles with emphasis on testable semicustom circuits
Error-control coding for computer systems
Error-control coding for computer systems
Some results on quadrilaterals in Steiner triple systems
Discrete Mathematics
On the upper bound of the size of the r-cover-free families
Journal of Combinatorial Theory Series A
Journal of Combinatorial Theory Series A
A simple construction of d-disjunct matrices with certain constant weights
Discrete Mathematics
Parallel Signature Analysis Design with Bounds on Aliasing
IEEE Transactions on Computers
Error-correcting nonadaptive group testing with de-disjunct matrices
Discrete Applied Mathematics
Some new bounds for cover-free families
Journal of Combinatorial Theory Series A
Asymptotically optimal erasure-resilient codes for large disk arrays
Discrete Applied Mathematics - Coding, cryptography and computer security
Explicit constructions of perfect hash families from algebraic curves over finite fields
Journal of Combinatorial Theory Series A
d-Disjunct matrices: bounds and Lovasz local lemma
Discrete Mathematics
Extending OPMISR beyond 10x Scan Test Efficiency
IEEE Design & Test
Design of compactors for signature-analyzers in built-in self-test
Proceedings of the IEEE International Test Conference 2001
OPMISR: the foundation for compressed ATPG vectors
Proceedings of the IEEE International Test Conference 2001
Analysis and Design of Optimal Combinational Compactors
VTS '03 Proceedings of the 21st IEEE VLSI Test Symposium
Application of Saluja-Karpovsky Compactors to Test Responses with Many Unknowns
VTS '03 Proceedings of the 21st IEEE VLSI Test Symposium
The Lovász Local Lemma and Its Applications to some Combinatorial Arrays
Designs, Codes and Cryptography
Erasure-resilient codes from affine spaces
Discrete Applied Mathematics
New Constructions for IPP Codes
Designs, Codes and Cryptography
X-Tolerant Test Response Compaction
IEEE Design & Test
ITC '04 Proceedings of the International Test Conference on International Test Conference
Recursive constructions of secure codes and hash families using difference function families
Journal of Combinatorial Theory Series A
A novel use of t-packings to construct d-disjunct matrices
Discrete Applied Mathematics
An Advanced Fault Isolation System for Digital Logic
IEEE Transactions on Computers
Explicit constructions for perfect hash families
Designs, Codes and Cryptography
New constructions of superimposed codes
IEEE Transactions on Information Theory
X-compact: an efficient response compaction technique
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
| Hi-index | 754.84 |
Test response compaction for integrated circuits (ICs) with scan-based design-for-testability (DFT) support in the presence of unknown logic values (Xs) is investigated from a combinatorial viewpoint. The theoretical foundations of X-codes, employed in an X-tolerant compaction technique called X-compact, are examined. Through the formulation of a combinatorial model of X-compact, novel design techniques are developed for X-codes to detect a specified maximum number of errors in the presence of a specified maximum number of unknown logic values, while requiring only small fan-out. The special class of X-codes that results leads to an avoidance problem for configurations in combinatorial designs. General design methods and nonconstructive existence theorems to estimate the compaction ratio of an optimal X-compactor are also derived.