Modeling design constraints and biasing in simulation using BDDs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Smart simulation using collaborative formal and simulation engines
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Constraint synthesis for environment modeling in functional verification
Proceedings of the 40th annual Design Automation Conference
Property-Specific Testbench Generation for Guided Simulation
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Combining Simulation and Guided Traversal for the Verification of Concurrent Systems
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Distance-guided hybrid verification with GUIDO
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Directed-simulation assisted formal verification of serial protocol and bridge
Proceedings of the 43rd annual Design Automation Conference
Guiding simulation with increasingly refined abstract traces
Proceedings of the 43rd annual Design Automation Conference
An Improved Distance Heuristic Function for Directed Software Model Checking
FMCAD '06 Proceedings of the Formal Methods in Computer Aided Design
An effective guidance strategy for abstraction-guided simulation
Proceedings of the 44th annual Design Automation Conference
Stimulus generation for constrained random simulation
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Simplifying Boolean constraint solving for random simulation-vector generation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
QuteRTL: towards an open source framework for RTL design synthesis and verification
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Novel test detection to improve simulation efficiency: a commercial experiment
Proceedings of the International Conference on Computer-Aided Design
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In this paper, we proposed an Automatic Target Constraint Generation (ATCG) technique to automatically generate compact and high-quality constraints for the guided random simulation environment. Our objective is to tackle the biggest bottleneck of the entire constrained random simulation process --- the time-consuming and error-prone manual testbench composition process. By taking only the design under verification and simulation coverage as our inputs, our automatic constraint generation technique can successfully generate just a few key constraints while achieving very high simulation coverage. Our experimental results show that the proposed approach can outperform both directed and random simulations in both coverage and simulation runtime for a variety of designs