Computer-aided verification of coordinating processes: the automata-theoretic approach
Computer-aided verification of coordinating processes: the automata-theoretic approach
Validation with guided search of the state space
DAC '98 Proceedings of the 35th annual Design Automation Conference
Model checking
Improving coverage analysis and test generation for large designs
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Formal property verification by abstraction refinement with formal, simulation and hybrid engines
Proceedings of the 38th annual Design Automation Conference
A hybrid verification approach: getting deep into the design
Proceedings of the 39th annual Design Automation Conference
Smart simulation using collaborative formal and simulation engines
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Coverage-Directed Test Generation Using Symbolic Techniques
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Counterexample-Guided Abstraction Refinement
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
SAT Based Abstraction-Refinement Using ILP and Machine Learning Techniques
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Using a formal specification and a model checker to monitor and direct simulation
Proceedings of the 40th annual Design Automation Conference
Learning from BDDs in SAT-based bounded model checking
Proceedings of the 40th annual Design Automation Conference
Using Counter Example Guided Abstraction Refinement to Find Complex Bugs
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Improving Ariadne's Bundle by Following Multiple Threads in Abstraction Refinement
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Improving SAT-Based Bounded Model Checking by Means of BDD-Based Approximate Traversals
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Fine-Grain Abstraction and Sequential Don't Cares for Large Scale Model Checking
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
Automatic abstraction without counterexamples
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
An effective guidance strategy for abstraction-guided simulation
Proceedings of the 44th annual Design Automation Conference
Efficient design validation based on cultural algorithms
Proceedings of the conference on Design, automation and test in Europe
Improved visibility in one-to-many trace concretization
Proceedings of the conference on Design, automation and test in Europe
Guided model checking for programs with polymorphism
Proceedings of the 2009 ACM SIGPLAN workshop on Partial evaluation and program manipulation
A Meta Heuristic for Effectively Detecting Concurrency Errors
HVC '08 Proceedings of the 4th International Haifa Verification Conference on Hardware and Software: Verification and Testing
Efficient Testing of Concurrent Programs with Abstraction-Guided Symbolic Execution
Proceedings of the 16th International SPIN Workshop on Model Checking Software
Constraints in one-to-many concretization for abstraction refinement
Proceedings of the 46th Annual Design Automation Conference
Simulation vs. formal: absorb what is useful; reject what is useless
HVC'07 Proceedings of the 3rd international Haifa verification conference on Hardware and software: verification and testing
An abstraction-guided simulation approach using Markov models for microprocessor verification
Proceedings of the Conference on Design, Automation and Test in Europe
Semiformal verification of temporal properties in automotive hardware dependent software
Proceedings of the Conference on Design, Automation and Test in Europe
Automatic constraint generation for guided random simulation
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
System level formal verification via model checking driven simulation
CAV'13 Proceedings of the 25th international conference on Computer Aided Verification
| Hi-index | 0.00 |
We combine abstraction refinement and simulation to provide a more efficient approach to checking invariant properties whose only counterexamples are very long traces. We allow each transition of an abstract error trace to map to multiple transitions of the concrete error trace and simulate pseudorandom vectors to build segments of the concrete trace. This approach addresses the capacity limitation of the formal verification engine as well as the short-sightedness of the simulator, thus providing a more effective technique for deep, subtle bugs.