Evolutionary computation: toward a new philosophy of machine intelligence
Evolutionary computation: toward a new philosophy of machine intelligence
Transistor sizing issues and tool for multi-threshold CMOS technology
DAC '97 Proceedings of the 34th annual Design Automation Conference
Mixed-Vth (MVT) CMOS circuit design methodology for low power applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Low power synthesis of dual threshold voltage CMOS VLSI circuits
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Proceedings of the 39th annual Design Automation Conference
Evolution and Optimum Seeking: The Sixth Generation
Evolution and Optimum Seeking: The Sixth Generation
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
Unveiling the ISCAS-85 Benchmarks: A Case Study in Reverse Engineering
IEEE Design & Test
Low-Power, High-Speed CMOS VLSI Design
ICCD '02 Proceedings of the 2002 IEEE International Conference on Computer Design: VLSI in Computers and Processors (ICCD'02)
Statistical optimization of leakage power considering process variations using dual-Vth and sizing
Proceedings of the 41st annual Design Automation Conference
Leakage power reduction by dual-vth designs under probabilistic analysis of vth variation
Proceedings of the 2004 international symposium on Low power electronics and design
Low power gate-level design with mixed-Vth (MVT) techniques
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
VLSI Design Challenges for Gigascale Integration
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Reducing Leakage with Mixed-V_th (MVT)
VLSID '05 Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design
Total leakage power optimization with improved mixed gates
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
Evolutionary computation: comments on the history and current state
IEEE Transactions on Evolutionary Computation
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State-of-the-art technologies in very large scale integration (VLSI) allow for the realization of gates with varying energy consumptions and hence delays (i.e., processing speeds) in the very same circuit. By considering this technological advent as an option, the design process can pursue two different goals: (1) making the circuit as fast as possible and (2) making non-time-critical gates slower in order minimize the circuit's overall energy consumption. This paper utilizes evolutionary algorithms, a population-based heuristic optimization technique, in order to find optimal solutions. From a technological point of view, this goal can be accomplished by varying the individual threshold voltages, which determine both the device's processing speed and its leakage currents. The experimental results indicate that evolutionary algorithms yield significantly better solutions than rather traditional optimization algorithms. By maintaining populations of candidate solutions, evolutionary algorithms are able to escape from sub-optimal designs, which contrasts traditional single-point optimization approaches.