Principles of CMOS VLSI design: a systems perspective
Principles of CMOS VLSI design: a systems perspective
Static power optimization of deep submicron CMOS circuits for dual VT technology
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Design and optimization of dual-threshold circuits for low-voltage low-power applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Synthesis of low-leakage PD-SOI circuits with body-biasing
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Duet: an accurate leakage estimation and optimization tool for dual-Vt circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 39th annual Design Automation Conference
Standby power optimization via transistor sizing and dual threshold voltage assignment
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2003 international symposium on Low power electronics and design
Statistical analysis of subthreshold leakage current for VLSI circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Low power gate-level design with mixed-Vth (MVT) techniques
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
A Practical Transistor-Level Dual Threshold Voltage Assignment Methodology
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Total leakage power optimization with improved mixed gates
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
Low-leakage SRAM Design with Dual V_t Transistors
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
General transistor-level methodology on VLSI low-power design
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Design of mixed gates for leakage reduction
Proceedings of the 17th ACM Great Lakes symposium on VLSI
High-speed, low-leakage integrated circuits: An evolutionary algorithm perspective
Journal of Systems Architecture: the EUROMICRO Journal
VCLEARIT: a VLSI CMOS circuit leakage reduction technique for nanoscale technologies
ACM SIGARCH Computer Architecture News - Special issue: ALPS '07---advanced low power systems
ACM Journal on Emerging Technologies in Computing Systems (JETC)
Biologically-Inspired optimization of circuit performance and leakage: a comparative study
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
PATMOS'05 Proceedings of the 15th international conference on Integrated Circuit and System Design: power and Timing Modeling, Optimization and Simulation
An optimization mechanism intended for static power reduction using dual-Vth technique
Journal of Electrical and Computer Engineering
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