Power supply noise analysis methodology for deep-submicron VLSI chip design
DAC '97 Proceedings of the 34th annual Design Automation Conference
Efficient large-scale power grid analysis based on preconditioned krylov-subspace iterative methods
Proceedings of the 38th annual Design Automation Conference
Power grid reduction based on algebraic multigrid principles
Proceedings of the 40th annual Design Automation Conference
Fast flip-chip power grid analysis via locality and grid shells
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Fast algorithms for IR drop analysis in large power grid
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Parallel domain decomposition for simulation of large-scale power grids
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Power grid analysis benchmarks
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
High-performance implementation of the level-3 BLAS
ACM Transactions on Mathematical Software (TOMS)
Algorithm 887: CHOLMOD, Supernodal Sparse Cholesky Factorization and Update/Downdate
ACM Transactions on Mathematical Software (TOMS)
Multigrid on GPU: tackling power grid analysis on parallel SIMT platforms
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Parallel partitioning based on-chip power distribution network analysis using locality acceleration
ISQED '09 Proceedings of the 2009 10th International Symposium on Quality of Electronic Design
GPU friendly fast Poisson solver for structured power grid network analysis
Proceedings of the 46th Annual Design Automation Conference
Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation
Proceedings of the 47th Design Automation Conference
Locality-Driven Parallel Static Analysis for Power Delivery Networks
ACM Transactions on Design Automation of Electronic Systems (TODAES)
2011 TAU power grid simulation contest: benchmark suite and results
Proceedings of the International Conference on Computer-Aided Design
PowerRush: a linear simulator for power grid
Proceedings of the International Conference on Computer-Aided Design
On the preconditioner of conjugate gradient method: a power grid simulation perspective
Proceedings of the International Conference on Computer-Aided Design
Power grid analysis with hierarchical support graphs
Proceedings of the International Conference on Computer-Aided Design
Hierarchical analysis of power distribution networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A multigrid-like technique for power grid analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Power grid analysis using random walks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Power Grid Analysis and Optimization Using Algebraic Multigrid
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2011 TAU power grid simulation contest: benchmark suite and results
Proceedings of the International Conference on Computer-Aided Design
On the preconditioner of conjugate gradient method: a power grid simulation perspective
Proceedings of the International Conference on Computer-Aided Design
2012 TAU power grid simulation contest: benchmark suite and results
Proceedings of the International Conference on Computer-Aided Design
Parallel forward and back substitution for efficient power grid simulation
Proceedings of the International Conference on Computer-Aided Design
Benchmarking for research in power delivery networks of three-dimensional integrated circuits
Proceedings of the 2013 ACM international symposium on International symposium on physical design
Proceedings of the Conference on Design, Automation and Test in Europe
The impact of electromigration in copper interconnects on power grid integrity
Proceedings of the 50th Annual Design Automation Conference
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Large VLSI on-chip power delivery networks (PDN) are challenging to analyze due to sheer network complexity. In this paper, three power grid solvers developed in our group: a direct solver using Cholesky decomposition, a GPU-based multigrid preconditioning solver, and a partitioning-based solver using spatial locality, are reviewed. Following the requirements of TAU 2011 Power Grid Simulation Contest, single-threaded versions of these solvers are implemented and their performances are evaluated in terms of runtime, memory, maximum error and average error. The experimental results show that for the published IBM power grid benchmarks, the direct solver has the best overall performance among the three.