Performance-driven global placement via adaptive network characterization
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
A semi-persistent clustering technique for VLSI circuit placement
Proceedings of the 2005 international symposium on Physical design
Pre-layout Physical Connectivity Prediction with Application in Clustering-Based Placement
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
A tale of two nets: studies of wirelength progression in physical design
Proceedings of the 2006 international workshop on System-level interconnect prediction
Net cluster: a net-reduction based clustering preprocessing algorithm
Proceedings of the 2006 international symposium on Physical design
Intrinsic shortest path length: a new, accurate a priori wirelength estimator
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
An effective clustering algorithm for mixed-size placement
Proceedings of the 2007 international symposium on Physical design
An Enzyme-Inspired Approach to Surmount Barriers in Graph Bisection
ICCSA '08 Proceeding sof the international conference on Computational Science and Its Applications, Part I
WSEAS Transactions on Information Science and Applications
A pre-placement net length estimation technique for mixed-size circuits
Proceedings of the 11th international workshop on System level interconnect prediction
On Contracting Graphs to Fixed Pattern Graphs
SOFSEM '10 Proceedings of the 36th Conference on Current Trends in Theory and Practice of Computer Science
SafeChoice: a novel clustering algorithm for wirelength-driven placement
Proceedings of the 19th international symposium on Physical design
Detecting tangled logic structures in VLSI netlists
Proceedings of the 47th Design Automation Conference
A pre-placement individual net length estimation model and an application for modern circuits
Integration, the VLSI Journal
On graph contractions and induced minors
Discrete Applied Mathematics
Interconnect length estimation in VLSI designs: a retrospective
Proceedings of the 2014 on International symposium on physical design
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In this paper, we propose a new efficient O(nlogn) connectivity-based bottom-up clustering algorithm called edge separability-based clustering (ESC). Unlike existing bottom-up algorithms that are based on local connectivity information of the netlist, ESC exploits more global connectivity information using edge separability to guide the clustering process, while carefully monitoring cluster area balance. Exact computation of the edge separability λ(e) for a given edge e=(x,y) in an edge-weighted undirected graph G is equivalent to finding the maximum flow between x and y. Since the currently best known time bounds for solving the maximum flow problem is O(mnlog(n2/m)), due to Goldberg and Tarjan (Goldberg and Tarjan, 1988), the computation of λ(e) for all edges in G requires O(m2nlog(n2/m)) time. However, we show that a simple and efficient algorithm CAPFOREST (Nagamochi and Ibaraki, 1992) can be used to provide a good approximation of edge separability (within 9.1% empirical error bound) for all edges in G without using any network flow computation in O(nlogn) time. Our experimental results based on large-scale benchmark circuits demonstrate the effectiveness of using edge separability in the context of multilevel partitioning framework for cutsize minimization. We observe that exploiting edge separability yields better quality partitioning solution compared to existing clustering algorithms (Sun and Sechen, 1993), (Cong and Smith, 1993), (Huang and Kahng, 1995), (Ng et al., 1987), (Wei and Cheng, 1991), (Shin and Kim, 1993), (Schuler and Ulrich, 1972), (Karypis et al., 1997), that rely on local connectivity information. In addition, our ESC-based iterative improvement based multilevel partitioning algorithm LR/ESC-PM provides comparable results to state-of-the-art hMetis package (Karypis et al., 1997), (Karypis and Kumar, 1999).