Technology mapping of sequential circuits for LUT-based FPGAs for performance

  • Authors:
  • Peichen Pan;C. L. Liu

  • Affiliations:
  • Dept. of Electrical & Computer Eng., Clarkson University, Potsdam, NY;Dept. of Computer Science, University of Illinois at Urbana-Champaign, Urbana, IL

  • Venue:
  • Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
  • Year:
  • 1996

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Abstract