Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
A method for generating weighted random test pattern
IBM Journal of Research and Development
An analytical approach to the partial scan problem
Journal of Electronic Testing: Theory and Applications
Low-Cost Testing of High-Density Logic Components
IEEE Design & Test
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Calculatoin of Multiple Sets of Weights for Weighted-Random Testing
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Design of an Efficient Weighted-Random-Pattern Generation System
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
Generation of Optimized Single Distributions of Weights for Random Built-in Self-Test
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
EDCC-3 Proceedings of the Third European Dependable Computing Conference on Dependable Computing
On Using Deterministic Test Sets in BIST
IOLTW '00 Proceedings of the 6th IEEE International On-Line Testing Workshop (IOLTW)
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