A new approach to simultaneous buffer insertion and wire sizing
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
DAC '98 Proceedings of the 35th annual Design Automation Conference
Buffer insertion for noise and delay optimization
DAC '98 Proceedings of the 35th annual Design Automation Conference
Getting to the bottom of deep submicron
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Requirements for models of achievable routing
ISPD '00 Proceedings of the 2000 international symposium on Physical design
GTX: the MARCO GSRC technology extrapolation system
Proceedings of the 37th Annual Design Automation Conference
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
The interpretation and application of Rent's rule
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on system-level interconnect prediction
Pre-layout prediction of interconnect manufacturability
Proceedings of the 2001 international workshop on System-level interconnect prediction
Optimal n-tier multilevel interconnect architectures for gigascale integration (GSI)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Exploiting Metal Layer Characteristics for Low-Power Routing
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
A priori wire length distribution models with multiterminal nets
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)
Prelayout interconnect yield prediction
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)
A Novel Metric for Interconnect Architecture Performance
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
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