SDL with applications from protocol specification
SDL with applications from protocol specification
Hardware/software co-simulation
DAC '94 Proceedings of the 31st annual Design Automation Conference
DAC '96 Proceedings of the 33rd annual Design Automation Conference
DAC '97 Proceedings of the 34th annual Design Automation Conference
Dynamic communication models in embedded system co-simulation
DAC '97 Proceedings of the 34th annual Design Automation Conference
A geographically distributed framework for embedded system design and validation
DAC '98 Proceedings of the 35th annual Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
Techniques for reducing read latency of core bus wrappers
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Standards for system-level design: practical reality or solution in search of a question?
DATE '00 Proceedings of the conference on Design, automation and test in Europe
An efficient architecture model for systematic design of application-specific multiprocessor SoC
Proceedings of the conference on Design, automation and test in Europe
Mixed-level cosimulation for fine gradual refinement of communication in SoC design
Proceedings of the conference on Design, automation and test in Europe
Methodology for hardware/software co-verification in C/C++ (short paper)
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
Latency-guided on-chip bus network design
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Efficient exploration of the SoC communication architecture design space
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Optimizing communication in embedded system co-simulation
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Automatic generation of embedded memory wrapper for multiprocessor SoC
Proceedings of the 39th annual Design Automation Conference
Component-based design approach for multicore SoCs
Proceedings of the 39th annual Design Automation Conference
Unifying memory and processor wrapper architecture in multiprocessor SoC design
Proceedings of the 15th international symposium on System Synthesis
Multiprocessor SoC Platforms: A Component-Based Design Approach
IEEE Design & Test
Static analysis of transaction-level models
Proceedings of the 40th annual Design Automation Conference
Application of Multi-domain and Multi-language Cosimulation To an Optical MEM Switch Design
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Supporting Cache Coherence in Heterogeneous Multiprocessor Systems
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Journal of Systems and Software - Special issue: Rapid system prototyping
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs
Proceedings of the 42nd annual Design Automation Conference
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Chip Hardware-in-the-Loop Simulation (CHILS) - embedding microcontroller hardware in simulation
MS '08 Proceedings of the 19th IASTED International Conference on Modelling and Simulation
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In communication refinement with multiple communication protocols and abstraction levels, the system specification is described by heterogeneous components in terms of communication protocols and abstraction levels. To adapt each heterogeneous component to the other part of system, we present a generic wrapper architecture that can adapt different protocols or different abstraction levels, or both. In this paper, we give a detailed explanation of applying the generic wrapper architecture to mixed-level cosimulation. As preliminary experiments, we applied it to mixed-level cosimulation of an IS-95 CDMA cellular phone system.