A framework for object oriented hardware specification, verification, and synthesis

Authors:
T. Kuhn;T. Oppold;M. Winterholer;W. Rosenstiel;Marc Edwards;Yaron Kashai
Affiliations:
University of Tuebingen, Sand 13, Germany;University of Tuebingen, Sand 13, Germany;University of Tuebingen, Sand 13, Germany;University of Tuebingen, Sand 13, Germany;Cisco Systems, Inc., 7025 Kit Creek Road, RTP, NC;Verisity Design, Inc., 2041 Landings Drive, Mountain View, CA
Venue:
Proceedings of the 38th annual Design Automation Conference
Year:
2001

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Abstract

We describe two things. First, we present a uniform framework for object oriented specification and verification of hardware. For this purpose the object oriented language “e” is introduced along with a powerful run-time environment that enables the designer to perform the verification task. Second, we present an object oriented synthesis that enhances “e” and its dedicated run-time environment into a framework for specification, verification, and synthesis. The usability of our approach is demonstrated by real-world examples.