Communications of the ACM
On the analysis and optimization of selftimed processor arrays
Integration, the VLSI Journal
Self-timed rings and their application to division
Self-timed rings and their application to division
Delay-insensitive multi-ring structures
Integration, the VLSI Journal - Special issue on asynchronous systems
A gate-delay model for high-speed CMOS circuits
DAC '94 Proceedings of the 31st annual Design Automation Conference
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Digital systems engineering
An Algorithm for Exact Bounds on the Time Separation of Events in Concurrent Systems
IEEE Transactions on Computers
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
ASYNC '97 Proceedings of the 3rd International Symposium on Advanced Research in Asynchronous Circuits and Systems
Predicting Performance of Micropipelines Using Charlie Diagrams
ASYNC '98 Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Symbolic Time Separation of Events
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
Bounding Average Time Separations of Events in Stochastic Timed Petri Nets with Choice
ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems
PATMOS'10 Proceedings of the 20th international conference on Integrated circuit and system design: power and timing modeling, optimization and simulation
Constrained asynchronous ring structures for robust digital oscillators
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Comparison of self-timed ring and inverter ring oscillators as entropy sources in FPGAs
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
A very high speed true random number generator with entropy assessment
CHES'13 Proceedings of the 15th international conference on Cryptographic Hardware and Embedded Systems
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Various researchers have proposed using self-timed networks to generate and distribute clocks and other timing signals. We consider one of the simplest self-timed networks, a ring, and note that for timing applications, self-timed rings should maintain uniform spacing of events. In practice, all previous designs of which we are aware cluster events into bursts. In this paper, we describe a dynamical systems approach to verify the temporal properties of self-timed rings. With these methods, we can verify that a new design has the desired uniform spacing of events. The key to our methods is developing an appropriate model of the timing behaviour of our circuits. Our model is more accurate than the simplistic interval bounds of timed-automata techniques, while providing a higher level of abstraction than non-linear differential equation models such as SPICE. Evenly spaced and clustered event behaviours are distinguished by simple geometric features of our model.