Fastpath: A Path-Delay Test Generator for Standard Scan Designs

Accurate and efficient fault simulation of realistic CMOS network breaks

DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference

Path delay ATPG for standard scan design

EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation

Functional test generation for delay faults in combinational circuits

ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design

Functional test generation for delay faults in combinational circuits

ACM Transactions on Design Automation of Electronic Systems (TODAES)

ATPG tools for delay faults at the functional level

DATE '99 Proceedings of the conference on Design, automation and test in Europe

ATPG tools for delay faults at the functional level

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Delay fault testing of IP-based designs via symbolic path modeling

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

On the Set of Target Path Delay Faults in Sequential Subcircuits of LUT-based FPGAs

FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications

Path Delay Fault Test Generation for Standard Scan Designs Using State Tuples

ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference

On Invalidation Mechanisms for Non-Robust Delay Tests

ITC '00 Proceedings of the 2000 IEEE International Test Conference

On Validating Data Hold Times for Flip-Flops in Sequential Circuits

ITC '00 Proceedings of the 2000 IEEE International Test Conference

Too Much Delay Fault Coverage Is a Bad Thing

ITC '01 Proceedings of the 2001 IEEE International Test Conference

On Selecting Testable Paths in Scan Designs

Journal of Electronic Testing: Theory and Applications

Testability Insertion in Behavioral Descriptions

ISSS '96 Proceedings of the 9th international symposium on System synthesis

AC Scan Path Selection for Physical Debugging

IEEE Design & Test

Evaluation of delay fault testability of LUTs for the enhancement of application-dependent testing of FPGAs

Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Reconfigurable systems

Detection of multiple transitions in delay fault test of SPARC64 microprocessor

Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design

Transition path delay faults: a new path delay fault model for small and large delay defects

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

ATPG-XP: test generation form maximal crosstalk-induced faults

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Testability features of the MC68060 microprocessor

ITC'94 Proceedings of the 1994 international conference on Test