A design for testability scheme with applications to data path synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Accumulator-Based Compaction of Test Responses
IEEE Transactions on Computers
Concurrent testing in high-level synthesis
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
Design of Testable Multipliers for Fixed-Width Data Paths
IEEE Transactions on Computers
Behavioral synthesis for easy testability in data path scheduling
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Allocation and Assignment in High-Level Synthesis for Self-Testable Data Paths
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
An Effective BIST Scheme for Datapaths
Proceedings of the IEEE International Test Conference on Test and Design Validity
A Parameterized VHDL Library for On-Line Testing
Proceedings of the IEEE International Test Conference
Arithmetic built-in self test for high-level synthesis
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
Experimental Results for Self-Dual Multi-Output Combinational Circuits
Journal of Electronic Testing: Theory and Applications
A Fault Tolerant Technique for FPGAs
Journal of Electronic Testing: Theory and Applications
Low-Cost On-Line Test for Digital Filters
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
On-Line Monitor Design of Finite-State Machines
Journal of Electronic Testing: Theory and Applications
CASP: concurrent autonomous chip self-test using stored test patterns
Proceedings of the conference on Design, automation and test in Europe
| Hi-index | 0.00 |
Abstract: In this paper we report a versatile BIST approach(VBIST) that targets both off-line and on-line selftest. VBIST uses off-line BIST circuitry for on-line testing aswell. Unlike traditional on-line self test approaches, VBISTdoes not use functional data as test inputs. Rather, VBISTgenerates test patterns and compacts test responses duringthe normal mode of operation. Furthermore, VBIST coordinatesthis generation and application of test patterns andcompaction of test responses with the usage profile of themodules in the design. VBIST entails little additional impacton performance and area of the design (vis-a-vis theperformance and area of a design with off-line BIST). Wevalidated the VBIST approach using the Synopsys BehavioralCompiler as the synthesis framework and by writingsynthesis scripts for incorporating VBIST constraints.