Interconnect design for deep submicron ICs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Digital systems engineering
Interconnect coupling noise in CMOS VLSI circuits
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Getting to the bottom of deep submicron II: a global wiring paradigm
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Buffer block planning for interconnect-driven floorplanning
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Current Sensing Techniques for Global Interconnects in Very Deep Submicron(VDSM) CMOS
WVLSI '01 Proceedings of the IEEE Computer Society Workshop on VLSI 2001
Differential current-sensing for on-chip interconnects
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Mitigating static power in current-sensed interconnects
Proceedings of the 14th ACM Great Lakes symposium on VLSI
A Low-Latency and Low-Power Hybrid Insertion Methodology for Global Interconnects in VDSM Designs
NOCS '07 Proceedings of the First International Symposium on Networks-on-Chip
Current-sensing and repeater hybrid circuit technique for on-chip interconnects
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Designing interconnects is becoming an increasingly challenging problem with a few solutions. In this paper hybrid circuit based on the well known delay-optimal repeaters and the recently proposed differential current-sensing is presented. Comparison in terms of delay, power and area is drawn between various versions of the hybrid circuit with delay-optimal repeater insertion and differential current sensing in order to derive at the best possible solution. It is shown that driving 25% of the wire with repeaters and remaining with current-sensing is the best solution from delay standpoint (about 30% faster than delay-optimal repeaters). Not only do hybrid circuits consume less area, they are also a more acceptable solution from placement point of view due to fewer repeaters and a long segment of uninterrupted wire. Static power consumption inherited from differential current-sensing is the biggest drawback of the hybrid circuits.