Methods for hierarchical automatic layout of custom LSI circuit masks
DAC '78 Proceedings of the 15th Design Automation Conference
An optimum channel-routing algorithm for polycell layouts of integrated circuits
DAC '73 Proceedings of the 10th Design Automation Workshop
LTX - a system for the directed automatic design of LSI circuits
DAC '76 Proceedings of the 13th Design Automation Conference
DAC '76 Proceedings of the 13th Design Automation Conference
A high quality, low cost router for MOS/LSI
DAC '72 Proceedings of the 9th Design Automation Workshop
Wire routing by optimizing channel assignment within large apertures
DAC '71 Proceedings of the 8th Design Automation Workshop
Advanced LILAC - an Automated Layout Generation system for MOS/LSIs
DAC '74 Proceedings of the 11th Design Automation Workshop
CALMOS: A portable software system for the automatic and interactive layout of MOS/LSI
DAC '79 Proceedings of the 16th Design Automation Conference
MIRAGE - a simple-model routing program for the hierarchical layout design of IC masks
DAC '79 Proceedings of the 16th Design Automation Conference
MISER: an integrated three layer gridless channel router and compactor
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Routing method for VLSI design using irregular cells
DAC '83 Proceedings of the 20th Design Automation Conference
An over-cell gate array channel router
DAC '83 Proceedings of the 20th Design Automation Conference
The Hughes Automated Layout System - automated LSI/VLSI layout based on channel routing
DAC '81 Proceedings of the 18th Design Automation Conference
Computation of power supply nets in VLSI layout
DAC '81 Proceedings of the 18th Design Automation Conference
MILD - A cell-based layout system for MOS-LSI
DAC '81 Proceedings of the 18th Design Automation Conference
The 1-2-3 routing algorithm or the single channel 2-step router on 3 interconnection layers
DAC '82 Proceedings of the 19th Design Automation Conference
Automated layout in ASHLAR: An approach to the problems of “General Cell” layout for VLSI
DAC '82 Proceedings of the 19th Design Automation Conference
Channel routing with non-terminal doglegs
EURO-DAC '90 Proceedings of the conference on European design automation
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A “grid-free” channel router (termed GFR) is reported. GFR does not employ grid lines and can obtain better results than the fixed-grid method. Additionally, GFR has several optional functions, such as “constraint loop breaking”, “total branch length minimization”, “constraint chain cutting” and “layer changing”. The algorithms of these functions are outlined and results obtained by using them are presented.