Automated layout in ASHLAR: An approach to the problems of “General Cell” layout for VLSI

  • Authors:
  • James E. Hassett

  • Affiliations:
  • -

  • Venue:
  • DAC '82 Proceedings of the 19th Design Automation Conference
  • Year:
  • 1982

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Abstract

The automated layout facilities of the ASHLAR program, currently under development at the Defense Systems Division of Sperry Univac, are described. ASHLAR is an interactive layout system to be used in developing hierarchical VLSI designs with cells having arbitrary dimensions. Treatment of the problems of placement, power bus routing, and polysilicon interconnect usage are given particular attention. Finally, some results of a prototype implementation are presented.