Efficient Transition Fault ATPG Algorithms Based on Stuck-At Test Vectors

Authors:
Xiao Liu;Michael S. Hsiao;Sreejit Chakravarty;Paul J. Thadikaran
Affiliations:
The Bradley Dept. Electrical & Computer Engineering, Virginia Tech, Blacksburg, VA 24061, USA;The Bradley Dept. Electrical & Computer Engineering, Virginia Tech, Blacksburg, VA 24061, USA;Intel Architecture Group, Intel Corporation, Santa Clara, CA 95052, USA;Intel Architecture Group, Intel Corporation, Santa Clara, CA 95052, USA
Venue:
Journal of Electronic Testing: Theory and Applications
Year:
2003

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Abstract

This paper presents a new model for gate-to-channel GOS defects. The transistors used in digital cell library are usually designed with a minimum-size. This new model permits to handle minimal-length transistors allowing the simulation of GOS defects ...