Leakage and leakage sensitivity computation for combinational circuits

  • Authors:
  • Emrah Acar;Anirudh Devgan;Rahul Rao;Ying Liu;Haihua Su;Sani Nassif;Jeffrey Burns

  • Affiliations:
  • IBM Research - Austin, Austin, TX;IBM Research - Austin, Austin, TX;IBM Research - Austin, Austin, TX;IBM Research - Austin, Austin, TX;IBM Research - Austin, Austin, TX;IBM Research - Austin, Austin, TX;IBM Research - Austin, Austin, TX

  • Venue:
  • Proceedings of the 2003 international symposium on Low power electronics and design
  • Year:
  • 2003

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Abstract

Leakage power is emerging as a new critical challenge in the design of high performance integrated circuits. Leakage is increasing dramatically with each technology generation and is expected to dominate system power. This paper describes a static (i.e input independent) technique for efficient and accurate leakage estimation. A probabilistic technique is presented to compute the average leakage of combinational circuits. The proposed technique gives accurate results with an average error of only 2% for the ISCAS benchmarks and accurately predict both subthreshold and gate leakage as well as the leakage sensitivities to process and environmental parameters.