Reachability analysis using partitioned-ROBDDs
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Model checking
Chaff: engineering an efficient SAT solver
Proceedings of the 38th annual Design Automation Conference
Partition-based decision heuristics for image computation using SAT and BDDs
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Combining Decision Diagrams and SAT Procedures for Efficient Symbolic Model Checking
CAV '00 Proceedings of the 12th International Conference on Computer Aided Verification
Applying SAT Methods in Unbounded Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
VIS: A System for Verification and Synthesis
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Search State Equivalence for Redundancy Identification and Test Generation
Proceedings of the IEEE International Test Conference on Test: Faster, Better, Sooner
Conflict driven learning in a quantified Boolean Satisfiability solver
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
SAT and ATPG: Boolean engines for formal hardware verification
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
SAT-based unbounded symbolic model checking
Proceedings of the 40th annual Design Automation Conference
SATORI - A Fast Sequential SAT Engine for Circuits
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Efficient Preimage Computation Using A Novel Success-Driven ATPG
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
A complexity analysis of sequential ATPG
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Safety Property Verification Using Sequential SAT and Bounded Model Checking
IEEE Design & Test
An Efficient Sequential SAT Solver With Improved Search Strategies
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
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Reachability checking and Pre-image computation are fundamental problems in ATPG and formal verification. Traditional sequential search techniques based on ATPG/SAT, or on OBDDS have diverging strengths and weaknesses. In this paper, we describe how structural analysis and conflict-based learning are combined in order to improve the efficiency of sequential search. We use conflict-based learning and illegal state learning across time-frames. We also address issues in efficiently bounding the search space in a single time-frame and across time-frames. We analyze each of these techniques experimentally and demonstrate the advantages of each technique. We compare performance against a commercial sequential ATPG engine and VIS [13] on a set of standard benchmarks.