Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Profile-driven program synthesis for evaluation of system power dissipation
DAC '97 Proceedings of the 34th annual Design Automation Conference
Power estimation for architectural exploration of HW/SW communication on system-level buses
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Architecture-level power estimation and design experiments
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Platform-Based Design and Software Design Methodology for Embedded Systems
IEEE Design & Test
PowerPlay-Fast Dynamic Power Estimation Based on Logic Simulation
ICCD '91 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Energy-Efficiency of VLSI Caches: A Comparative Study
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Software Power Optimizations In An Embedded System
VLSID '01 Proceedings of the The 14th International Conference on VLSI Design (VLSID '01)
Efficient RTL Power Estimation for Large Designs
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
CACO-PS: A General Purpose Cycle-Accurate Configurable Power Simulator
SBCCI '03 Proceedings of the 16th symposium on Integrated circuits and systems design
Instruction-based system-level power evaluation of system-on-a-chip peripheral cores
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
High-level area and power estimation for VLSI circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Static power modeling of 32-bit microprocessors
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Accurate and fast system-level power modeling: An XScale-based case study
ACM Transactions on Embedded Computing Systems (TECS) - Special Section LCTES'05
Accurate and fast system-level power modeling: An XScale-based case study
ACM Transactions on Embedded Computing Systems (TECS)
On-the-fly hardware acceleration for protocol stack processing in next generation mobile devices
CODES+ISSS '09 Proceedings of the 7th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Power efficient co-simulation framework for a wireless application using platform based SoC
SAMOS'07 Proceedings of the 7th international conference on Embedded computer systems: architectures, modeling, and simulation
Hardware cost estimation for application-specific processor design
SAMOS'05 Proceedings of the 5th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Power Modeling and Characterization of Computing Devices: A Survey
Foundations and Trends in Electronic Design Automation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Among the many metrics used to characterize the quality of an embedded system-on-chip design,power consumption has emerged as one of the most important. This is largely due to the proliferation of mobile battery powered computing devices, the increasing speed and density of CMOS (complementarymetal-oxide semiconductor) VLSI (very large-scale integration) circuits, and continuous shrinking of the transistor feature size of deep-submicron technologies.The authors have developed a technique that derives power figures from the execution of high-level models. This technique makes it possible to assess embedded SoC designs much earlier in the designcycle, contributing to sounder decisions throughout the entire development process and leading to a faster execution time. To validate their methodology, the authors applied it to a peripheral core驴a baud rate generator驴and compared the results with those obtained using a gatelevel approach.