Zero-suppressed BDDs for set manipulation in combinatorial problems
DAC '93 Proceedings of the 30th international Design Automation Conference
Symbolic model checking using SAT procedures instead of BDDs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A machine program for theorem-proving
Communications of the ACM
Formal property verification by abstraction refinement with formal, simulation and hybrid engines
Proceedings of the 38th annual Design Automation Conference
SAT-Based Image Computation with Application in Reachability Analysis
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Checking Safety Properties Using Induction and a SAT-Solver
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
Symbolic Model Checking without BDDs
TACAS '99 Proceedings of the 5th International Conference on Tools and Algorithms for Construction and Analysis of Systems
Symbolic Reachability Analysis Based on SAT-Solvers
TACAS '00 Proceedings of the 6th International Conference on Tools and Algorithms for Construction and Analysis of Systems: Held as Part of the European Joint Conferences on the Theory and Practice of Software, ETAPS 2000
Applying SAT Methods in Unbounded Symbolic Model Checking
CAV '02 Proceedings of the 14th International Conference on Computer Aided Verification
SAT-based unbounded symbolic model checking
Proceedings of the 40th annual Design Automation Conference
A Novel SAT All-Solutions Solver for Efficient Preimage Computation
Proceedings of the conference on Design, automation and test in Europe - Volume 1
SATORI - A Fast Sequential SAT Engine for Circuits
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Efficient Preimage Computation Using A Novel Success-Driven ATPG
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Fine-Grain Abstraction and Sequential Don't Cares for Large Scale Model Checking
ICCD '04 Proceedings of the IEEE International Conference on Computer Design
An Efficient Sequential SAT Solver With Improved Search Strategies
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Efficient SAT-based unbounded symbolic model checking using circuit cofactoring
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Automatic abstraction without counterexamples
TACAS'03 Proceedings of the 9th international conference on Tools and algorithms for the construction and analysis of systems
Hybrid BDD and All-SAT Method for Model Checking
Languages: From Formal to Natural
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In recent years, Boolean Satisfiability (SAT) has been shown to hold potential for Unbounded Model Checking (UMC). The success of SAT-based UMC largely relies on (i) the SAT solver efficiency, (ii) solution cube enlargement, and (iii) state-set management. In this paper, we propose a simple, yet efficient, clause conversion technique to account for the state set obtained by SAT-based UMC. Our state set is stored in a Zero-suppressed Binary Decision Diagram (ZBDD), and the shared structures in the ZBDD are exploited to aggressively avoid repeated manipulation of common subsets in the state-set. The resulting number of clauses, generated for the state set, now depends on the number of nodes in the ZBDD, rather than the number of solutions found. We integrated the proposed techniques in an Unbounded Model Checking framework that uses a pure SAT solver. The experimental results show that we can attain orders of magnitude improvement in both performance and capacity as compared to the existing techniques.